C2S

PRITVI-ACE: Platform for Reconfigurable Integrated Testing and Validation of IPs - Advanced Chip Evaluation

About PRITVI-ACE

PRITVI-ACE is a state-of-the-art, data-center-ready, multi-FPGA pre-silicon validation facility established at C-DAC Bangalore to address the rapidly growing complexity of modern semiconductor and system designs.

As digital systems scale in size, heterogeneity, and software dependence, validating designs at real-world operating speeds has become a fundamental requirement. Traditional simulation-based methodologies alone are no longer sufficient for validating large System-on-Chips (SoCs), software-driven architectures, and emerging chiplet-based systems.

PRITVI-ACE enables near-silicon-speed, FPGA-based hardware prototyping, supporting validation from individual IP blocks to full SoCs and complete system-level designs. The facility plays a critical role in enabling early system bring-up, software validation, and performance evaluation, well ahead of silicon availability.

National Context and Vision

PRITVI-ACE has been established in alignment with the objectives of the National Supercomputing Mission (NSM) and India Semiconductor Mission (ISM), as part of India's broader effort to build a product-focused semiconductor ecosystem.

By providing indigenous, large-scale pre-silicon pro infrastructure, PRITVI-ACE directly contributes to the Hon'ble Prime Minister's vision of Viksit Bharat-strengthening technology self-reliance, accelerating deep-tech innovation, and positioning India as a global leader in advanced computing and semiconductor systems.

Facility Overview

PRITVI-ACE is built on Siemens EDA Veloce ProFPGA CS platform with a scalable validation capacity of up to 2.4 billion ASIC-equivalent gates.

The platform enables multiple teams to work independently or collaboratively on shared national infrastructure, while ensuring optimal utilization and high productivity.

Designed with a modular, datacentre-class architecture and based on AMD VP1902 FPGAs, PRITVI-ACE delivers the performance, scalability, and flexibility required for validating today's most complex multi-billion-gate designs.

Key Capabilities

Near-silicon-speed FPGA-based prototyping
Scalable validation from individual IPs to large multi-FPGA SoCs and full systems
Support for heterogeneous and chiplet-based architectures
Parallel multi-user access for concurrent project execution
Early operating system boot, firmware, and driver validation
High-speed hardware interfaces and advanced memory subsystems
Multi-gigabit connectivity to accurately model real-world system behavior
At-speed validation and system-level debugging months ahead of silicon

Technical Specifications

Parameter	Specification
Validation Capacity	Up to 2.4 Billion ASIC Gates
No. of Blades	6
FPGAs per Blade	6
Total FPGA Count	36
FPGA Type	AMD Xilinx VP1902
Platform	Siemens EDA Veloce ProFPGA CS

Access and Utilization Model

PRITVI-ACE is a national shared infrastructure, designed to support:

Strategic R&D programmes under NSM, ISM, and related initiatives
Semiconductor startups under the Design Linked Incentive (DLI) scheme

The portal enables controlled access to the facility, supporting fair scheduling, optimal utilization, and secure multi-user operation.

To Register for access of C-DAC PRITVI-ACE facility