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Fostering Next Generation Capabilities Among Chip Designers For Making India Self-Reliant In Electronics System Design

About the Programme

Chips to Startup (C2S) Programme aims to train 85,000 number of Specialized Manpower over a period of 5 years in the area of VLSI and Embedded System Design and leapfrog in ESDM space by way of inculcating the culture of System-on-Chip (SoC)/ System Level Design at Bachelors, Masters and Research level and act as a catalyst for growth of Start-ups involved in fabless design.

Objectives

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Generating Industry-ready manpower in System/ SoC Design area for creating vibrant fabless chip design ecosystem in the country

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Promoting industry-led R&D, translational research and strengthening IndustryAcademia collaboration

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The culture of developing reusable IP Cores & developing ASIC/ SoC/ Systems for societal/ strategic sectors.

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Broaden the base of ASIC / IC design in the Country by accommodating more academic institutions, start-ups for design of IPs / ASICs / Systems/ SoCs .

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Protection of Intellectual Property generated etc. & To inculcate the culture of entrepreneurship among students & researchers by way of incubating startups.

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KEY RESEARCH & DEVELOPMENT AREAS

PROGRAMME HIGHLIGHTS

Specialized Manpower

IP Cores/ ASICs/ SoCs

Patents

Publication

IEP/ Training

Student trained through Smart lab

IMAGE GALLERY

WHO CAN PARTICIPATE?

Academia

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Start-ups/MSMEs

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R&D Organizations

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CONTACT US

Satya Mev Jayate Logo
Smt. Hemlata Gupta
Scientist 'D', MeitY
Electronics Niketan, CGO Complex
Lodhi Road, New Delhi - 110003.
E-Mail: support[dot]c2s[at]meity[dot]gov[dot]in


Shri Vivian Desalphine ,
Scientist-F, C-DAC Bengaluru,
Shri Venkata Reddy Kolagatla,
Scientist-D, C-DAC Bengaluru,
Knowledge Park, #1, Old Madras Road
Byappanahalli, Bengaluru - 560038.
E-Mail: support[dot]c2s[at]cdac[dot]in

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