Steps to request for the EDA Tool by an academic institution and R&D organization (other than the organizations already supported under the C2S Programme)

1. Based on the Call for R&D Proposal, 113 organizations were earlier selected by the Expert Committee in year 2022 & 2023 for implementation of 65 R&D projects for identified physical deliverables (i.e. ASICs/ SoCs/ IP Cores/ FPGA Hardware based designs). These 113 organizations is being provided the financial support from MeitY and chip design infrastructure support (i.e. EDA Tools, MPW fabrication, trainings etc) from ChipIN Centre at C-DAC Bangalore for delivering these physical deliverables. The list of these 113 organizations is at (https://c2s.gov.in/proposallist.jsp) .
2. The request is now invited from Indian academic institutions / domestic R&D organizations (other than the above 113 organizations already supported for implementing 65 R&D projects) for providing access of EDA Tools by the ChipIN Centre from Synopsys, Cadence Design Systems, Siemens EDA etc. for teaching, instruction & research purposes thereby generating trained manpower. The access requests will be evaluated & considered by the ChipIN Centre on a first-come, first-served basis, contingent on the availability of sufficient licenses at the ChipIN Centre to achieve the desired outcomes. The ChipIN Centre reserves the right to withdraw access to these EDA tools at any point of time; if their use is deemed ineffective, infrequent, unauthorized, or insufficient in achieving the following desired outcomes.
3. Eligibility criteria: The organizations seeking EDA tools from the ChipIN Centre (other than the organizations availing financial support in Category-I, Category-II & Category-III under C2S Programme) are required to meet the following eligibility criteria:


(i) The organizations should have existing Programs for B.E./ B.Tech or M.E./ M.Tech in Electronics & Communication/ Electrical Engineering/ Microelectronics/ VLSI/ Integrated Circuit/ Embedded System/ Electronic System Design or equivalent.

(ii) The organizations should have the availability of requisite infrastructure & capital equipment for VLSI design lab; as well as permanent faculty members / professionals in VLSI design domain.

4. Steps to be followed by an organization for getting access of EDA Tools available at ChipIN Centre under C2S Programme:


(i) Head of the organization to send an email from their official email-id with details of the required EDA tools to the following - chipin@cdac.in & support.c2s@meity.gov.in.

(ii) Head of the organization to nominate and share contact details of 2 permanent faculty members/ professionals as point of contact (POC) for future interactions with the ChipIN Centre.

(iii) An undertaking to be provided by the head of organization on the institute letter-head (containing the sign & seal) affirming the following:

1. The organization has existing Programs for B.E./ B.Tech or M.E./ M.Tech in Electronics & Communication/ Electrical Engineering/ Microelectronics/ VLSI/ Integrated Circuit/ Embedded System/ Electronic System Design or equivalent.

2. The organization has the requisite infrastructure & capital equipment for VLSI design lab; as well as permanent faculty members / professionals in VLSI design domain.

3. EDA tools provided by the ChipIN Centre under C2S Programme will be utilized only for teaching, instruction & research purposes by all faculty members, students & researchers at B.Tech, M.Tech, PhD levels and professionals/ engineers at the organization.

4. The Point of Contact (PoC) at the organization is responsible for ensuring that all users of EDA tools within the organization (including students, researchers, engineers, and faculty members) adopt the Unique Identifier Approach within one week of gaining access to the EDA tool from the ChipIN Centre, as outlined at https://c2s.gov.in/UniqueHost.jsp

5. Academic institution: shall conduct 15+ short-term VLSI Design projects of duration 4 weeks+ to train at least 273 number of industry-ready manpower specialized in VLSI / Embedded System design utilizing the EDA Tool resources made available by ChipIN Centre under C2S Programme:

   #	Type of Manpower	Year - I	Year - II	Year - III	Total
   1	Type-I manpower (PhD)	1	1	1	3
   2	Type-II manpower (M. Tech in VLSI/ Embedded System Design)	20	20	20	60
   3	Type-III manpower (M. Tech in Computer/Communication/Electronic System/ Equivalent with at least two VLSI courses/minor projects in VLSI, etc)	10	10	10	30
   4	Type-IV manpower (B. Tech with at least two VLSI courses/minor projects in VLSI)	60	60	60	180
   	Total	91	91	91	273

   
   It is hereby affirmed that the details of short-term VLSI Design projects to be conducted should be shared with the ChipIN Centre at the beginning of every six months (Targeted projects title/ area/ duration and number of type-wise manpower); along with the details of short-term VLSI Design projects conducted in last 6 months (Title/ area/ duration of projects conducted and number of type-wise manpower generated).

6. R&D organization: shall conduct 10+ short-term VLSI Design projects of duration of 4 weeks+ to train at least 120 number of industry-ready manpower specialized in VLSI / Embedded System design utilizing the EDA Tool resources made available by ChipIN Centre under C2S Programme

   #	Type of Manpower	Year - I	Year - II	Year - III	Total
   1	Type-I manpower (PhD)	40	40	40	120
   2	Type-II manpower (M. Tech in VLSI/ Embedded System Design)
   3	Type-III manpower (M. Tech in Computer/Communication/Electronic System/ Equivalent with at least two VLSI courses/minor projects in VLSI, etc)
   4	Type-IV manpower (B. Tech with at least two VLSI courses/minor projects in VLSI)
   5	Other manpower (professionals/ engineers)

   
   It is hereby affirmed that the details of short-term VLSI Design projects to be conducted should be shared with the ChipIN Centre at the beginning of every six months (Targeted projects title/ area/ duration and number of type-wise/ other manpower); along with the details of short-term VLSI Design projects conducted in last 6 months (Title/ area/ duration of projects conducted and number of type-wise/ other manpower generated).

5. Steps to be followed by the ChipIN Centre to enable EDA Toos at organization:

   (i) Step 1: Login credentials to be created by ChipIN Centre for the organization to access the ChipIN Support Centre (https://chipin.cdacb.in/) and ChipIN Cloud (https://chipin-cloud.cdacb.in).

   (ii) Step 2: Organization to sign the End User License Agreement (EULA) from the EDA tool vendor.

   (iii) Step 3: ChipIN Centre to provide details with the organization for raising a ticket on the ChipIN Support Centre to provide the WAN IPs of the organization for whitelisting.

   (iv) Step 4: ChipIN Centre to provide the checklist (including pre-recorded online EDA Tool installation videos) with the organization to ensure that their firewall and license checkout are functioning correctly.

   (v) Step 5: ChipIN Centre to provide the access to the EDA Tool licenses hosted centrally at ChipIN Centre.

   (vi) Step 6: ChipIN Centre to provide the vendor EDA Tool online support access credentials with the organization for vendor online support.

6. Domestic Start-ups / MSMEs may apply for access to EDA Tool made available by ChipIN Centre at website of DLI Scheme https://chips-dli.gov.in/DLI/HomePage